簡介
汪大暉教授畢業於國立台灣大學電機系,美國伊利諾大學香檳分校電機工程博士。
曾於美國HP實驗室(HP Labs)進行高速砷化鎵元件研發與蒙地卡羅模擬。研究領域包括快閃式記憶體元件,
CMOS元件,高壓元件,奈米結構電荷傳輸理論分析等,目前擁有200多篇國際期刊與會議論文,
及16項國際專利。
汪教授曾擔任IEDM,IRPS,VLSI-TSA等多項國際學術會議技術委員並曾為IEEE IPFA
課程主席與台灣、香港、中國大陸之IEEE 電子元件Newsletter主編。並曾獲得教育部教學獎,
IPFA最佳論文獎,並為2005 VLSI最佳學生論文獎之指導教授。
汪教授目前擔任國際電子元件頂尖期刊
IEEE EDL編輯、旺宏電子顧問與交通大學教授。除此之外,並與工業界擁有多次合作,包括
加拿大NRC、工研院、台積電、聯電、旺宏、矽統、立錡等,都曾進行或正在進行多項研究計畫,計畫內容
涵蓋奈米級CMOS元件、Flash Memory、FinFET、Monte Carlo simulation、Strain CMOS、High K/ Metal Gate
、高壓元件等。汪教授並曾擔任國家高普考典試委員。
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擔任國際學術會議重要職務、受邀演講(Invited Talk)
Awards and Honors |
1990 |
Youth Research Paper Award, Chinese Institute of
Engineers |
1991 |
Outstanding Teaching Award, Ministry of Education,
Taiwan |
2004 |
Best Paper Award, IEEE Int. Symp. on the Physical and
Failure Analysis of Integrated Circuits (IPFA) |
2005 |
Best Student Paper Award (as an thesis advisor and
co-author), VLSI Symp. on Technology |
2005 |
TSMC Student Research Award (as thesis advisor) |
2006 |
指導博士生詹前泰獲”2006年台灣飛利浦半導體領袖培植計劃得主”第一名 |
2007-2010 |
Outstanding Research Award, National Chiao-Tung
University |
Invited Journal Paper |
2006 |
“Program Charge Spatial Distribution in Two-bit Storage
SONOS flash Memory”, Engineering Science & Technology
Bulletin, National Science Council, Taiwan |
2007 |
“Bipolar Charge Trapping Induced Anomalous Negative
Bias-Temperature Instability in HfSiON Gate Dielectric
pMOSFETs” IEEE Trans. on Device and Material Reliability
(TDMR) |
Invited Talks |
1998 |
“Hot Carrier Effects in Flash EEPROMs”, Workshop on the Role
of Hydrogen and Deuterium in Hot Electron Device Degradation,
Univ. of Illinois, U.S.A. |
2000 |
“Hot Carrier Effects and Tunnel Oxide Reliability in Flash
EEPROMS”, Symp. on Nano Device Technology (SNDT) |
2001 |
“Auger Recombination Enhanced Hot
Carrier Effects and Luminescence in MOSFETs”, National Research
Council, Ottawa, Canada |
2003 |
“NROM Reliability Physics and Qualification Methodology”,
Infenion, Germany |
2003 |
“Reliability Models of Data Retention and Read-Disturb in
2-bit Nitride Storage Flash Memory Cells”, Int. Electron Devices
Meeting (IEDM), Washington D.C., U.S.A. |
2004 |
“Comparison of Oxide Breakdown Progression in Ultra-Thin
Oxide SOI and Bulk pMOSFETs,” European Symposium Reliability of
Electron Devices, Failure Physics and Analysis (ESREF), Zurich,
Switzerland |
2006 |
“Nitride Trap Storage Flash Memory—Reliability and Scaling
Issues”, Symp. on Nano Device Technology (SNDT) |
2008 |
“Reliability Issues in NOR-Type SONOS Flash Memory Scaling,”
National Science Council-Japan Science and Technology Nano
Device Workshop, |
2010 |
“Random Telegraph Noise and Scaling Concerns in SONOS Flash
Memory”, Symp. on Nano Device Technology (SNDT) |
2011 |
“Non-Volatile Semiconductor Memory Technology in Tera-Bit
Era---3D SONOS”, National Taiwan University |
Partial List of Professional Activities |
1994 |
IEEE senior member |
1996 |
Technical Program Committee, Int. Relaibility Physics
Symp. (IRPS) |
1999-2000 |
Technical Program Committee, Int. Electron Devices
Meeting (IEDM) |
2001-2005 |
Technical Program Chair, Photonics and Semiconductor
Device Reliability Workshop |
2002-2007 |
Name in the “Golden List of Reviewers” for IEEE Electron
Device Letters |
2003-2005 |
Technical Program Committee, VLSI-Technology, System and
Application |
2004 |
Tutorial Chair, IEEE Int. Symp. on the Physical and
Failure Analysis of Integrated Circuits (IPFA) |
2004 |
高普考典試委員(電機電子組) |
2004 |
Si Subcommittee Chair, Int. Electron Device and
Materials Symp.(IEDMS) |
2007 |
櫃檯買賣中心上櫃審議委員 |
2007-2008 |
Session Chair, VLSI-Technology, System and Application,
Taiwan |
2009 |
交通大學校務基金管理委員 |
2009 |
Technical Program Committee, Int. Electron Device and
Materials Symp.(IEDMS) |
2010-2011 |
Technical Program Committee, Asian Symposium on Quality
Electronic Design (ASQED) |
2010 |
Technical Program Committee, Int. Electron Device and
Materials Symp.(IEDMS) |
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